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| 74VHC00 QUAD 2-INPUT NAND GATE s s s s s s s s s s HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 00 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.) SOP TSSOP ORDER CODES PACKAGE SOP TSSOP TUBE 74VHC00M T&R 74VHC00MTR 74VHC00TTR DESCRIPTION The 74VHC00 is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2001 1/8 74VHC00 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L L H H B L H L H Y H H H L ABSOLUTE MAXIMUM RATINGS Symbol V CC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 20 25 50 -65 to +150 300 Unit V V V mA mA mA mA C C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol V CC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 1) (VCC = 3.3 0.3V) (VCC = 5.0 0.5V) Parameter Value 2 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 100 0 to 20 Unit V V V C ns/V 1) VIN from 30% to 70% of VCC 2/8 74VHC00 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 VOL Low Level Output Voltage 2.0 3.0 4.5 3.0 4.5 II ICC Input Leakage Current Quiescent Supply Current 0 to 5.5 5.5 IO=-50 A IO=-50 A IO=-50 A IO=-4 mA IO=-8 mA IO=50 A IO=50 A IO=50 A IO=4 mA IO=8 mA VI = 5.5V or GND VI = VCC or GND TA = 25C Min. 1.5 0.7VCC Value -40 to 85C Min. 1.5 0.7VCC -55 to 125C Min. 1.5 0.7VCC Unit Typ. Max. Max. Max. V 0.5 0.3VCC VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage V IL 0.5 0.3VCC 0.5 0.3VCC V VOH 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 1.9 2.9 4.4 2.48 3.8 1.9 2.9 4.4 2.4 3.7 0.1 0.1 0.1 0.44 0.44 1 20 0.1 0.1 0.1 0.55 0.55 1 20 A A V V 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 0.1 2 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Value TA = 25C Min. Typ. 5.5 8.0 3.7 5.2 Max. 7.9 11.4 5.5 7.5 -40 to 85C Min. 1.0 1.0 1.0 1.0 Max. 9.5 13.0 6.5 8.5 -55 to 125C Min. 1.0 1.0 1.0 1.0 Max. 9.5 13.0 6.5 8.5 ns Unit Test Condition Symbol Parameter VCC (V) 3.3 (*) 3.3 (*) CL (pF) 15 50 15 50 tPLH tPHL Propagation Delay Time 5.0(**) 5.0(**) (*) Voltage range is 3.3V 0.3V (**) Voltage range is 5.0V 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Min. CIN C PD Input Capacitance Power Dissipation Capacitance (note 1) TA = 25C Typ. 6 19 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate) 3/8 74VHC00 DYNAMIC SWITCHING CHARACTERISTICS Test Condition Symbol Parameter VCC (V) TA = 25C Min. Typ. 0.3 5.0 -0.8 C L = 50 pF 3.5 -0.3 Max. 0.8 V Value -40 to 85C Min. Max. -55 to 125C Min. Max. Unit VOLP V OLV V IHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 5.0 V 5.0 1.5 V 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT C L =15/50pF or equivalent (includes jig and probe capacitance) R T = ZOUT of pulse generator (typically 50) 4/8 74VHC00 WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 5/8 74VHC00 SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13G 6/8 74VHC00 TSSOP14 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 7/8 74VHC00 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Swit zerland - United Kingdom (c) http://w ww.st.com 8/8 |
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